Datasheet

Section 6 Bus Controller (BSC)
Rev.7.00 Mar. 18, 2009 page 162 of 1136
REJ09B0109-0700
Bit Bit Name Initial Value R/W Description
2
1
0
MXC2
MXC1
MXC0
0
0
0
R/W
R/W
R/W
011: 11-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A11 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A12 used for
comparison
Synchronous DRAM interface
100: 8-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A8 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A9 used for
comparison
The precharge-sel is A15 to A9 of the column
address.
101: 9-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A9 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A10 used for
comparison
The precharge-sel is A15 to A10 of the column
address.
110: 10-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A10 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A11 used for
comparison
The precharge-sel is A15 to A11 of the column
address.