Datasheet

Section 7 DMA Controller (DMAC)
Rev.7.00 Mar. 18, 2009 page 321 of 1136
REJ09B0109-0700
A
ddress T
A
ddress B
Transfer
DAC
K
1 byte or word transfer performed in
response to 1 transfer request
Legend:
Address T = L
Address B = L + (–1)
DTID
· (2
DTSZ
· (N – 1))
Where : L = Value set in MAR
N = Value set in ETCR
Figure 7.9 Operation in Single Address Mode (When Sequential Mode Is Specified)
Figure 7.10 shows an example of the setting procedure for single address mode (when sequential
mode is specified).