Datasheet

Section 10 I/O Ports
Rev.7.00 Mar. 18, 2009 page 468 of 1136
REJ09B0109-0700
• P13/PO11/TIOCD0/TCLKB
The pin function is switched as shown below according to the combination of the TPU channel
0 settings (by bits MD3 to MD0 in TMDR_0, bits IOD3 to IOD0 in TIOR0L, and bits CCLR2
to CCLR0 in TCR_0), bits TPSC2 to TPSC0 in TCR_0 to TCR_2, bit NDER11 in NDERH,
and bit P13DDR.
TPU channel 0
settings
(1) in table
below
(2) in table below
P13DDR ⎯ 0 1 1
NDER11 ⎯ ⎯ 0 1
P13 input P13 output PO11 output Pin function TIOCD0 output
TIOCD0 input
*
1
TCLKB input
*
2
Notes: 1. TIOCD0 input when MD3 to MD0 = B'0000 and IOD3 to IOD0 = B'10××.
2. TCLKB input when the setting for any of TCR_0 to TCR_2 is TPSC2 to TPSC0 = B'101.
TCLKB input when phase counting mode is set for channels 1 and 5.
TPU channel 0
settings
(2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000
B'0100
B'1×××
B'0001 to
B'0011
B'0101 to
B'0111
⎯ B'××00 Other than B'××00
CCLR2, CCLR0 ⎯ ⎯ ⎯ ⎯ Other
than
B'110
B'110
Output function ⎯ Output
compare
output
⎯ ⎯ PWM mode
2 output
⎯
Legend:
×: Don’t care