Datasheet

Rev.7.00 Mar. 18, 2009 page lxiii of lxvi

REJ09B0109-0700

Section 16 I

C Bus Interface 2 (IIC2) (Option).................................................771

Table 16.1 Pin Configuration.................................................................................................... 773

Table 16.2 Transfer Rate........................................................................................................... 776

Table 16.3 Interrupt Requests ................................................................................................... 801

Table 16.4 Time for monitoring SCL........................................................................................ 802

Section 17 A/D Converter..................................................................................805

Table 17.1 Pin Configuration.................................................................................................... 807

Table 17.2 Analog Input Channels and Corresponding ADDR Registers................................. 808

Table 17.3 A/D Conversion Time (Single Mode)..................................................................... 814

Table 17.4 A/D Conversion Time (Scan Mode)........................................................................ 815

Table 17.5 A/D Converter Interrupt Source.............................................................................. 816

Table 17.6 Analog Pin Specifications ....................................................................................... 820

Section 18 D/A Converter..................................................................................821

Table 18.1 Pin Configuration.................................................................................................... 824

Table 18.2 Control of D/A Conversion..................................................................................... 826

Table 18.3 Control of D/A Conversion..................................................................................... 827

Table 18.4 Control of D/A Conversion..................................................................................... 828

Section 19 RAM ................................................................................................831

Section 20 Flash Memory (0.35-μm F-ZTAT Version) ....................................833

Table 20.1 Differences between Boot Mode and User Program Mode..................................... 835

Table 20.2 Pin Configuration.................................................................................................... 840

Table 20.3 Erase Blocks............................................................................................................ 845

Table 20.4 Setting On-Board Programming Mode ................................................................... 846

Table 20.5 Boot Mode Operation.............................................................................................. 848

Table 20.6 System Clock Frequencies for which Automatic Adjustment

of LSI Bit Rate Is Possible ...................................................................................... 849

Table 20.7 Flash Memory Operating States.............................................................................. 855

Section 21 Flash Memory (0.18-μm F-ZTAT Version) ....................................861

Table 21.1 Comparison of Programming Modes ...................................................................... 865

Table 21.2 Pin Configuration.................................................................................................... 870

Table 21.3 Register/Parameter and Target Mode...................................................................... 872

Table 21.4 Parameters and Target Modes................................................................................. 880

Table 21.5 Setting On-Board Programming Mode ................................................................... 891

Table 21.6 System Clock Frequency for Automatic-Bit-Rate Adjustment by This LSI ........... 893

Table 21.7 Executable MAT ..................................................................................................... 911

Table 21.8 (1) Useable Area for Programming in User Program Mode....................................... 912