Datasheet

Section 12 Programmable Pulse Generator (PPG)
Rev.7.00 Mar. 18, 2009 page 636 of 1136
REJ09B0109-0700
NDRH
If pulse output groups 2 and 3 have the same output trigger, all eight bits are mapped to the same
address and can be accessed at one time, as shown below.
Bit Bit Name Initial Value R/W Description
7
6
5
4
3
2
1
0
NDR15
NDR14
NDR13
NDR12
NDR11
NDR10
NDR9
NDR8
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Next Data Register 15 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
If pulse output groups 2 and 3 have different output triggers, upper 4 bits and lower 4 bits are
mapped to the different addresses as shown below.
Bit Bit Name Initial Value R/W Description
7
6
5
4
NDR15
NDR14
NDR13
NDR12
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 15 to 12
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.
3
to
0
— All 1 — Reserved
1 is always read and write is disabled.
Bit Bit Name Initial Value R/W Description
7
to
4
— All 1 — Reserved
1 is always read and write is disabled.
3
2
1
0
NDR11
NDR10
NDR9
NDR8
0
0
0
0
R/W
R/W
R/W
R/W
Next Data Register 11 to 8
The register contents are transferred to the
corresponding PODRH bits by the output trigger
specified with PCR.