Datasheet

Section 15 Serial Communication Interface (SCI, IrDA)
Rev.7.00 Mar. 18, 2009 page 698 of 1136
REJ09B0109-0700
Bit Bit Name Initial Value R/W Description
1
0
CKS1
CKS0
0
0
R/W
R/W
Clock Select 1 and 0:
These bits select the clock source for the on-chip
baud rate generator.
00: φ clock (n = 0)
01: φ/4 clock (n = 1)
10: φ/16 clock (n = 2)
11: φ/64 clock (n = 3)
For the relation between the bit rate register setting
and the baud rate, see section 15.3.9, Bit Rate
Register (BRR). n is the decimal display of the
value of n in BRR (see section 15.3.9, Bit Rate
Register (BRR)).
15.3.6 Serial Control Register (SCR)
SCR performs enabling or disabling of SCI transfer operations and interrupt requests, and
selection of the transfer/receive clock source. For details on interrupt requests, refer to section
15.9, Interrupt Sources. Some bit functions of SCR differ in normal serial communication
interface mode and Smart Card interface mode.
Normal Serial Communication Interface Mode (When SMIF in SCMR is 0)
Bit Bit Name Initial Value R/W Description
7 TIE 0 R/W Transmit Interrupt Enable
When this bit is set to 1, TXI interrupt request is
enabled.
TXI interrupt request cancellation can be performed
by reading 1 from the TDRE flag, then clearing it to
0, or clearing the TIE bit to 0.
6 RIE 0 R/W Receive Interrupt Enable
When this bit is set to 1, RXI and ERI interrupt
requests are enabled.
RXI and ERI interrupt request cancellation can be
performed by reading 1 from the RDRF flag, or the
FER, PER, or ORER flag, then clearing the flag to
0, or by clearing the RIE bit to 0.