Datasheet

Section 1 Overview
Rev.7.00 Mar. 18, 2009 page 23 of 1136
REJ09B0109-0700
Pin No.
Type Symbol
H8S/2378
0.18μm
F-ZTAT Group,
H8S/2378R
0.18μm
F-ZTAT Group
(LQFP-144)
H8S/2378
0.18μm
F-ZTAT Group,
H8S/2378R
0.18μm
F-ZTAT Group
(LGA-145)
H8S/2377
H8S/2377R
H8S/2375
H8S/2373
H8S/2375R
H8S/2373R
I/O Function
Bus
control
HWR 88 H11 88 88 Output Strobe signal
indicating that
external address
space is to be
written, and the
upper half (D15 to
D8) of the data bus
is enabled.
Write enable signal
for accessing the
DRAM space.
LWR 87 J13 87 87 Output Strobe signal
indicating that
external address
space is to be
written, and the
lower half (D7 to
D0) of the data bus
is enabled.
BREQ 132 D5 132 132 Input The external bus
master requests the
bus to this LSI.
BREQO 130 B6 130 130 Output External bus
request signal when
the internal bus
master accesses
the external space
in external bus
release state.
BACK 131 C7 131 131 Output Indicates the bus is
released to the
external bus
master.