Datasheet

Section 21 Flash Memory (0.18-μm F-ZTAT Version)
Rev.7.00 Mar. 18, 2009 page 871 of 1136
REJ09B0109-0700
21.3 Register Descriptions
The registers/parameters which control flash memory are shown as follows.
• Flash code control status register (FCCS)
• Flash program code select register (FPCS)
• Flash erase code select register (FECS)
• Flash key code register (FKEY)
• Flash MAT select register (FMATS)
• Flash transfer destination address register (FTDAR)
• Download pass and fail result (DPFP)
• Flash pass and fail result (FPFR)
• Flash multipurpose address area (FMPAR)
• Flash multipurpose data destination area (FMPDR)
• Flash erase Block select (FEBS)
• Flash program and erase frequency control (FPEFEQ)
• Flash vector address control register (FVACR)
There are several operating modes for accessing flash memory, for example, read mode/program
mode.
There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters
are allocated for each operating mode and MAT selection. The correspondence of operating modes
and registers/parameters for use is shown in table 21.3.