Datasheet

Section 26 Electrical Characteristics
Rev.7.00 Mar. 18, 2009 page 1085 of 1136
REJ09B0109-0700
Tp
t
AD2
φ
SDRAMφ
Address bus
Data bus
RAS
RAS
CAS
CAS
WE
WE
CKE
CKE
Precharge-sel
DQMU,
DQML
Data bus
DQMU,
DQML
Tr Tc1 Tw Tc2
Write
Read
t
CSD4
t
DQMD
t
RDS3
t
RDH3
t
CSD4
t
CSD4
t
CSD4
t
CSD4
t
CSD4
t
CSD4
t
CSD4
t
DQMD
t
CSD4
t
CSD4
t
CSD4
t
CSD4
t
DQMD
t
DQMD
t
WDD
t
WDH4
t
CSD4
t
CSD4
High
High
Figure 26.25 Synchronous DRAM Basic Access Timing (CAS Latency 2)