Datasheet
Section 6 Bus Controller (BSC)
Rev.7.00 Mar. 18, 2009 page 204 of 1136
REJ09B0109-0700
T
p
T
r
T
c1
T
c2
T
c1
T
c2
RASn (CSn)
Read
Write
UCAS, LCAS
WE (HWR)
OE (RD)
Data bus
WE (HWR)
OE (RD)
Data bus
Address bus
φ
Note: n = 2 to 5
Row address Column address 1 Column address 2
High
High
Figure 6.30 Operation Timing in Fast Page Mode
(RAST = 0, CAST = 0)










