Datasheet

Section 8 EXDMA Controller (EXDMAC)
Rev.7.00 Mar. 18, 2009 page 364 of 1136
REJ09B0109-0700
Block Transfer Mode:
Bit Bit Name Initial Value R/W Description
31
to
24
— All 0 — Reserved
These bits are always read as 0 and cannot be
modified.
23
to
16
Undefined R/W Block Size
These bits specify the block size (number of bytes
or number of words) for block transfer. Setting H'01
specifies one as the block, while setting H'00
specifies the maximum block size, that is 256. The
register value always indicates the specified block
size.
15
to
0
Undefined R/W 16-Bit Transfer Counter
These bits specify the number of block transfers.
Setting H'0001 specifies one block transfer. Setting
H'0000 means no specification for the number of
transfers, and the transfer counter function is
halted. In this case, there is no transfer end
interrupt by the transfer counter. Setting H'FFFF
specifies the maximum number of block transfers,
that is 65,535. During EXDMA transfer, this counter
shows the remaining number of block transfers.