Datasheet

Section 10 I/O Ports
Rev.7.00 Mar. 18, 2009 page 462 of 1136
REJ09B0109-0700
10.1.4 Pin Functions
Port 1 pins also function as the pins for PPG outputs, TPU I/Os, and EXDMAC outputs
*
. The
correspondence between the register specification and the pin functions is shown below.
• P17/PO15/TIOCB2/TCLKD/EDRAK3
*
3
The pin function is switched as shown below according to the combination of the TPU channel
2 settings (by bits MD3 to MD0 in TMDR_2, bits IOB3 to IOB0 in TIOR_2, and bits CCLR1
and CCLR0 in TCR_2), bits TPSC2 to TPSC0 in TCR_0 and TCR_5, bit NDER15 in
NDERH, bit EDRAKE in EDMDR_3, and bit P17DDR.
Modes 1, 2, 4, 7 (EXPE = 1)
EDRAKE 0 1
TPU channel 2
settings
(1) in table
below
(2) in table below ⎯
P17DDR ⎯ 0 1 1 ⎯
NDER15 ⎯ ⎯ 0 1 ⎯
TIOCB2 output P17
input
P17
output
PO15
output
EDRAK3 output Pin function
TIOCB2 input
*
1
TCLKD input
*
2