Datasheet

Section 10 I/O Ports
Rev.7.00 Mar. 18, 2009 page 533 of 1136
REJ09B0109-0700
• PF2/LCAS/IRQ15/DQML
*
2
The pin function is switched as shown below according to the combination of the operating
mode, bit EXPE, bits RMTS2 to RMTS0 in DRAMCR, bits ABW5 to ABW2 in ABWCR, and
bit PF2DDR.
Operating
mode
1, 2, 4 3
*
2
, 7
EXPE ⎯ 0 1
Areas
2 to 5
Any
DRAM /
synchro-
nous
DRAM
*
2
space
area is
16-bit bus
space
All DRAM/
synchronous
DRAM
*
2
space
areas are 8-bit bus
space, or areas 2 to
5 are all normal
space
⎯ Any
DRAM/
synchro-
nous
DRAM
*
2
space
area is
16-bit bus
space
All DRAM/
synchronous
DRAM
*
2
space
areas are 8-bit bus
space, or areas 2 to
5 are all normal
space
PF2DDR ⎯ 0 1 0 1 ⎯ 0 1
Pin function LCAS/
DQML
*
2
output
PF2 input PF2
output
PF2 input PF2
output
LCAS/
DQML
*
2
output
PF2 input PF2
output
IRQ15 interrupt input
*
1
Notes: 1. IRQ15 interrupt input when bit ITS15 is cleared to 0 in ITSR.
2. Not used in the H8S/2378 0.18μm F-ZTAT Group, H8S/2377, H8S/2375, and
H8S/2373.