Datasheet

Section 17 A/D Converter
Rev.7.00 Mar. 18, 2009 page 806 of 1136
REJ09B0109-0700
Module data bus
Control circuit
Internal data bus
10-bit D/A
Comparator
+
–
Sample-and-
hold circuit
ADI interrupt
signal
Bus interface
A
D
C
S
R
A
D
C
R
A
D
D
R
D
A
D
D
R
C
A
D
D
R
G
A
D
D
R
F
A
D
D
R
E
A
D
D
R
H
A
D
D
R
B
A
D
D
R
A
A
VCC
Vref
A
VSS
A
N0
A
N1
A
N2
A
N3
A
N4
A
N5
A
N6
A
N7
A
N8
A
N9
A
N10
A
N11
A
N12
A
N13
A
N14
A
N15
ADTRG
Conversion start
trigger from 8-bit
timer or TPU
Successive approximations
register
Multiplexer
Legend:
ADCR: A/D control register
ADCSR: A/D control/status register
ADDRA: A/D data register A
ADDRB: A/D data register B
ADDRC: A/D data register C
ADDRD: A/D data register D
ADDRE: A/D data register E
ADDRF: A/D data register F
ADDRG: A/D data register G
ADDRH: A/D data register H
Figure 17.1 Block Diagram of A/D Converter