Datasheet

Section 18 D/A Converter
Rev.7.00 Mar. 18, 2009 page 829 of 1136
REJ09B0109-0700
18.4 Operation
The D/A converter includes D/A conversion circuits for six channels
*
1
, each of which can operate
independently.
When DAOE bit in DACR01
*
2
, DACR23, or DACR45
*
3
is set to 1, D/A conversion is enabled
and the conversion result is output.
The operation example concerns D/A conversion on channel 2. Figure 18.4 shows the timing of
this operation.
[1] Write the conversion data to DADR2.
[2] Set the DAOE2 bit in DACR23 to 1. D/A conversion is started. The conversion result is output
from the analog output pin DA2 after the conversion time t
DCONV
has elapsed. The conversion
result is continued to output until DADR2 is written to again or the DAOE2 bit is cleared to 0.
The output value is expressed by the following formula:
DADR contents
256
× Vre
f
[3] If DADR2 is written to again, the conversion is immediately started. The conversion result is
output after the conversion time t
DCONV
has elapsed.
[4] If the DAOE2 bit is cleared to 0, analog output is disabled.
Notes: 1. Two channels are available for the H8S/2375, H8S/2375R, H8S/2373, and H8S/2373R.
2. Not supported by the H8S/2375, H8S/2375R, H8S/2373, and H8S/2373R.
3. Not supported by the H8S/2375, H8S/2375R, H8S/2373, and H8S/2373R.