Datasheet

Section 22 ROM
Page 950 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
22.4.7 Block Configuration
The flash memory is divided into three 64 kbytes blocks, one 32 kbytes block, and eight 4 kbytes
blocks.
Address H'00000
Address H'3FFFF
64 kbytes
32 kbytes
64 kbytes
64 kbytes
256 kbytes
4 kbytes
×
8
Figure 22.6 Flash Memory Block Configuration
22.4.8 Pin Configuration
The flash memory is controlled by means of the pins shown in table 22.5.
Table 22.5 Pin Configuration
Pin Name Abbreviation I/O Function
Reset RES Input Reset
Flash write enable FWE Input Flash memory program/erase protection by
hardware
Mode 2 MD2 Input Sets MCU operating mode
Mode 1 MD1 Input Sets MCU operating mode
Mode 0 MD0 Input Sets MCU operating mode
Port F0 PF0 Input Sets MCU operating mode in programmer mode
Port 16 P16 Input Sets MCU operating mode in programmer mode
Port 14 P14 Input Sets MCU operating mode in programmer mode
Transmit data TxD2 Output Serial transmit data output
Receive data RxD2 Input Serial receive data input