Datasheet

Section 22 ROM

R01UH0166EJ0600 Rev. 6.00 Page 955 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

Bit 0—Program 1 (P1): Selects program mode transition or clearing. Do not set the SWE1,

PSU1, ESU1, EV1, PV1, or E1 bit at the same time.

Bit 0

P1 Description

0 Program mode cleared (Initial value)

1 Transition to program mode

[Setting condition]

When FWE = 1, SWE1 = 1, and PSU1 = 1

22.5.2 Flash Memory Control Register 2 (FLMCR2)

Bit: 7 6 5 4 3 2 1 0

FLER — — — — — — —

Initial value: 0 0 0 0 0 0 0 0

R/W: R — — — — — — —

Note: FLMCR2 is a read-only register, and should not be written to.

FLMCR2 is an 8-bit register used for flash memory operating mode control. FLMCR2 is

initialized to H'00 by a power-on reset, and in hardware standby mode and software standby mode.

When on-chip flash memory is disabled, a read will return H'00.

Bit 7—Flash Memory Error (FLER): Indicates that an error has occurred during an operation

on flash memory (programming or erasing). When FLER is set to 1, flash memory goes to the

error-protection state.

Bit 7

FLER Description

0 Flash memory is operating normally (Initial value)

Flash memory program/erase protection (error protection) is disabled

[Clearing condition]

Power-on reset or hardware standby mode

1 An error has occurred during flash memory programming/erasing

Flash memory program/erase protection (error protection) is enabled

[Setting condition]

See section 22.8.3, Error Protection