Datasheet

Section 23A Clock Pulse Generator
(H8S/2633, H8S/2632, H8S/2631, H8S/2633F)
Page 998 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
External circuitry such as that shown below is recommended around the PLL.
PLLCAP
PLLVCC
PLLVSS
VCC
PVCC
VSS
R1: 3 kΩ C1: 470 pF
Rp: 200 Ω
CPB: 0.1 μF
*
CB: 0.1 μF
*
CB: 0.1 μF
*
Note: * CB and CPB are laminated ceramic capacitors.
(Values are recommended values.)
Figure 23A.5 Points for Attention when Using PLL Oscillation Circuit
Place oscillation stabilization capacitor C1 and resistor R1 close to the PLLCAP pin, and ensure
that no other signal lines cross this line. Supply the C1 ground from PLLVSS.
Separate PLLVCC and PLLVSS from the other VCC and VSS lines at the board power supply
source, and be sure to insert bypass capacitors CPB and CB close to the pins.