Datasheet

Section 2 CPU
R01UH0166EJ0600 Rev. 6.00 Page 51 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Execution States
Instruction Mnemonic H8S/2600 H8S/2000
MULXU MULXU.B Rs, Rd 3 12
MULXU.W Rs, ERd 4 20
MULXS MULXS.B Rs, Rd 4 13
MULXS.W Rs, ERd 5 21
In addition, there are differences in address space, CCR and EXR register functions, power-down
modes, etc., depending on the model.
2.1.3 Differences from H8/300 CPU
In comparison to the H8/300 CPU, the H8S/2600 CPU has the following enhancements.
More general registers and control registers
Eight 16-bit expanded registers, and one 8-bit and two 32-bit control registers, have been
added.
Expanded address space
Normal mode
*
supports the same 64-kbyte address space as the H8/300 CPU.
Advanced mode supports a maximum 16-Mbyte address space.
Note: * Not available in the H8S/2633 Group.
Enhanced addressing
The addressing modes have been enhanced to make effective use of the 16-Mbyte address
space.
Enhanced instructions
Addressing modes of bit-manipulation instructions have been enhanced.
Signed multiply and divide instructions have been added.
A multiply-and-accumulate instruction has been added.
Two-bit shift instructions have been added.
Instructions for saving and restoring multiple registers have been added.
A test and set instruction has been added.
Higher speed
Basic instructions execute twice as fast.