Datasheet

Section 24 Power-Down Modes
R01UH0166EJ0600 Rev. 6.00 Page 1019 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Program-halted state
Program execution state
SCK2 to
SCK0= 0
SCK2 to
SCK0
≠ 0
SLEEP command
SSBY = 1, PSS = 1
DTON = 1, LSON = 1
Clock switching
exception processing
SLEEP command
SSBY = 1, PSS = 1
DTON = 1, LSON = 0
After the oscillation
stabilization time
(STS2 to 0), clock
switching exception
processing
SLEEP command
SLEEP
command
External
interrupt*
3
Any interrupt
SLEEP
command
SLEEP
command
SLEEP command
Interrupt*
2
LSON bit = 0
Interrupt*
2
Interrupt*
1
LSON bit = 1
STBY pin = High
RES pin = Low
STBY pin = Low
SSBY= 0, LSON= 0
SSBY= 1,
PSS= 0, LSON= 0
SSBY= 0,
PSS= 1, LSON= 1
SSBY= 1,
PSS= 1, DTON= 0
RES pin = High
: Transition after exception processing : Low power dissipation mode
Reset state
High-speed mode
(main clock)
Medium-speed
mode
(main clock)
Subactive mode
(subclock)
Subsleep mode
(subclock)
Hardware
standby mode
Software
standby mode
Sleep mode
(main clock)
Watch mode
(subclock)
Notes: When a transition is made between modes by means of an interrupt, the transition cannot be made
on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the
interrupt request.
From any state except hardware standby mode, a transition to the reset state occurs when RES is
driven Low.
From any state, a transition to hardware standby mode occurs when STBY is driven low.
Always select high-speed mode before making a transition to watch mode or subactive mode.
1. NMI, IRQ0 to IRQ7, and WDT1 interrupts
2. NMI, IRQ0 to IRQ7, IWDT0 interrupts, WDT1 interrupt, and TMR0 to TMR3 interrupts
3. NMI and IRQ0 to IRQ7
Figure 24.1 (a) Mode Transition Diagram (H8S/2633 Group, H8S/2633R)