Datasheet

Section 24 Power-Down Modes
Page 1020 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Program-halted state
Program execution state
SCK2 to
SCK0 = 0
SCK2 to
SCK0
≠ 0
SLEEP command
SLEEP
command
Any interrupt
STBY pin = High
RES pin = Low
STBY pin = Low
SSBY = 0
SSBY = 1, PSS = 0
RES pin = High
: Transition after exception processing : Low power dissipation mode
Reset state
High-speed mode
(main clock)
Medium-speed
mode
(main clock)
Hardware
standby mode
Software
standby mode
Sleep mode
(main clock)
Notes: When a transition is made between modes by means of an interrupt, the transition cannot be made
on interrupt source generation alone. Ensure that interrupt handling is performed after accepting the
interrupt request.
From any state except hardware standby mode, a transition to the reset state occurs when RES is
driven Low.
From any state, a transition to hardware standby mode occurs when STBY is driven low.
* NMI and IRQ0 to IRQ7
External
interrupt*
Figure 24.1 (b) Mode Transition Diagram (H8S/2695)