Datasheet

Section 24 Power-Down Modes
R01UH0166EJ0600 Rev. 6.00 Page 1027 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
to 2. For details of other bits, see section 23A.2.2 and 23B.2.2, Low-Power Control Register
(LPWRCR).
Bit 7—Direct Transition ON Flag (DTON): When shifting to low power dissipation mode by
executing the SLEEP instruction, this bit specifies whether or not to make a direct transition
between high-speed mode or medium-speed mode and the subactive modes
*
. The selected
operating mode after executing the SLEEP instruction is determined by the combination of other
control bits.
Note: * This function is not available in the H8S/2695.
Bit 7
DTON Description
0
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts to sleep mode, software standby mode, or watch mode
*
1
*
2
.
• When the SLEEP instruction is executed in subactive mode
*
2
, operation shifts
to subsleep mode
*
2
or watch mode
*
2
. (Initial value)
1
• When the SLEEP instruction is executed in high-speed mode or medium-speed
mode, operation shifts directly
*
2
to subactive mode
*
1
*
2
, or shifts to sleep mode or
software standby mode.
• When the SLEEP instruction is executed in subactive mode, operation shifts directly
to high-speed mode, or shifts to subsleep mode.
Notes: 1. Always set high-speed mode when shifting to watch mode or subactive mode.
2. This function is not available in the H8S/2695.