Datasheet

Section 24 Power-Down Modes
Page 1046 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
24.13 Usage Notes
(1) DMAC/DTC activation and subactive mode/watch mode transition
When a transition is made to subactive mode or watch mode, make a module stop setting for the
DMAC/DTC (write 1 to the corresponding bit in MSTPCR), then read 1 from that bit for
confirmation, before making the mode transition.
When exiting the module stop state (by writing 0 to the corresponding bit in MSTPCR), first make
a transition from subactive mode to active mode.
If a DMAC/DTC activation source occurs in subactive mode, the DMAC/DTC is activated when
the module stop state is exited after a transition is made to active mode.
(2) Interrupt sources and subactive mode/watch mode transition
For on-chip peripheral modules that stop operating in subactive mode (DMAC, DTC, TPU, PCB,
IIC), a corresponding interrupt cannot be cleared in subactive mode. Therefore, CPU interrupt
source clearance cannot be effected if a transition is made to subactive mode when an interrupt has
been requested.
Interrupts for these modules should be disabled before executing a SLEEP instruction and making
a transition to subactive mode or watch mode.
(3) Operation cannot be guaranteed if a transition is made to the subactive mode, subsleep mode,
or watch mode when the SUBSTP bit in LPWRCR is set to 1 (subclock generation prohibited).
To prevent problems, it should be confirmed that the SUBSTP bit has been cleared to 0 before
transitioning to the subactive mode, subsleep mode, or watch mode.