Datasheet

Section 25 Electrical Characteristics
(H8S/2633, H8S/2632, H8S/2631, H8S/2633F)
R01UH0166EJ0600 Rev. 6.00 Page 1061 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
25.3.3 Bus Timing
Table 25.7 lists the bus timing.
Table 25.7 Bus Timing
Condition A: V
CC
= PLLV
CC
= 3.0 V to 3.6 V, PV
CC
= 3.0 V to 5.5 V, AV
CC
= 3.6 V to 5.5 V
*
1
,
V
ref
= 3.6 V to AV
CC
*
2
, V
SS
= AV
SS
= PLLV
SS
= 0 V, φ = 2 to 16 MHz, T
a
= –20°C
to +75°C (regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition B: V
CC
= PLLV
CC
= 3.0 V to 3.6 V, PV
CC
= 4.5 V to 5.5 V, AV
CC
= 4.5 V to 5.5 V,
V
ref
= 4.5 V to AV
CC
, V
SS
= AV
SS
= PLLV
SS
= 0 V, φ = 2 to 25 MHz, T
a
= –20°C to
+75°C (regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Condition A Condition B
Item Symbol Min Max Min Max Unit
Test
Conditions
Address delay time t
AD
— 30 — 20 ns
Address setup time t
AS
0.5 ×
t
cyc
– 30
0.5 ×
t
cyc
– 15
— ns
Figure 25.6 to
figure 25.11
Address hold time t
AH
0.5 ×
t
cyc
– 20
0.5 ×
t
cyc
– 8
— ns
CS delay time 1 t
CSD1
— 30 — 20 ns
CS delay time 2 t
CSD2
— 30 — 18 ns
AS delay time t
ASD
— 30 — 18 ns
RD delay time 1 t
RSD1
— 30 — 18 ns
RD delay time 2 t
RSD2
— 30 — 18 ns
Read data setup
time
t
RDS
30 — 15 — ns
Read data hold
time
t
RDH
0 — 0 — ns
Read data access
time1
t
ACC1
1.0 ×
t
cyc
– 35
1.0 ×
t
cyc
– 25
ns
Read data access
time2
t
ACC2
1.5 ×
t
cyc
– 35
1.5 ×
t
cyc
– 25
ns
Read data access
time3
t
ACC3
2.0 ×
t
cyc
– 35
2.0 ×
t
cyc
– 25
ns
Read data access
time 4
t
ACC4
2.5 ×
t
cyc
– 35
2.5 ×
t
cyc
– 25
ns
Read data access
time 5
t
ACC5
3.0 ×
t
cyc
– 35
3.0 ×
t
cyc
– 25
ns