Datasheet

Section 26 Electrical Characteristics
(H8S/2633R)
R01UH0166EJ0600 Rev. 6.00 Page 1117 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Table 26.10 I
2
C Bus Timing
Conditions: PV
CC
= 4.5 V to 5.5 V, AV
CC
= 4.5 V to 5.5 V, V
ref
= 4.5 V to AV
CC
, V
SS
= AV
SS
=
PLLV
SS
= 0 V, φ = 5 MHz to maximum operating frequency, T
a
= –20°C to +75°C
(regular specifications), T
a
= –40°C to +85°C (wide-range specifications)
Ratings
Item Symbol Min Typ Max Unit Notes
SCL input cycle time t
SCL
12 t
cyc
— — ns Figure 26.33
SCL input high pulse width t
SCLH
3 t
cyc
— — ns
SCL input low pulse width t
SCLL
5 t
cyc
— — ns
SCL, SDA input rise time t
Sr
— — 7.5 t
cyc
*
ns
SCL, SDA input fall time t
Sf
— — 300 ns
SCL, SDA input spike pulse
elimination time
t
SP
— — 1 t
cyc
ns
SDA input bus free time t
BUF
5 t
cyc
— — ns
Start condition input hold time t
STAH
3 t
cyc
— — ns
Retransmission start condition input
setup time
t
STAS
3 t
cyc
— — ns
Stop condition input setup time t
STOS
3 t
cyc
— — ns
Data input setup time t
SDAS
0.5 t
cyc
— — ns
Data input hold time t
SDAH
0 — — ns
SCL, SDA capacitive load C
b
— — 400 pF
Note: * 17.5 t
cyc
can be set according to the clock selected for use by the I
2
C module. For details,
see section 18.4, Usage Notes.