Datasheet

Appendix A Instruction Set
Page 1220 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Instruction H N Z V C Definition
ROTXL —
0 N = Rm
Z = Rm · Rm–1 ·
......
· R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
ROTXR — 0 N = Rm
Z = Rm · Rm–1 ·
......
· R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
RTE Stores the corresponding bits of the result.
RTS — — — — —
SHAL — N = Rm
Z = Rm · Rm–1 ·
......
· R0
V = Dm · Dm–1 + Dm · Dm–1 (1-bit shift)
V = Dm · Dm–1 · Dm–2 · Dm · Dm–1 · Dm–2 (2-bit shift)
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
SHAR —
0 N = Rm
Z = Rm · Rm–1 ·
......
· R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
SHLL — 0 N = Rm
Z = Rm · Rm–1 ·
......
· R0
C = Dm (1-bit shift) or C = Dm–1 (2-bit shift)
SHLR — 0 0 N = Rm
Z = Rm · Rm–1 ·
......
· R0
C = D0 (1-bit shift) or C = D1 (2-bit shift)
SLEEP — — — — —
STC — — — — —
STM
*
2
— — — — —
STMAC —
— N = 1 if MAC instruction resulted in negative value in MAC
register
Z = 1 if MAC instruction resulted in zero value in MAC
register
V = 1 if MAC instruction resulted in overflow