Datasheet

Appendix B Internal I/O Register
Page 1238 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Address
Register
Name
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Module
Name
Data Bus
Width
(bits)
SMR2 C/A CHR PE O/E STOP MP CKS1 CKS0
H'FF88
SMR2 GM BLK PE O/E BCP1 BCP0 CKS1 CKS0
H'FF89 BRR2
8
H'FF8A SCR2 TIE RIE TE RE MPIE TEIE CKE1 CKE0
SCI2,
Smart card
interface
H'FF8B TDR2
H'FF8C SSR2 TDRE RDRF ORER FER PER TEND MPB MPBT
SSR2 TDRE RDRF ORER FER PER TEND MPB MPBT
H'FF8D RDR2
H'FF8E SCMR2 — — — — SDIR SINV — SMIF
H'FF90 ADDRAH AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 A/D 8
H'FF91 ADDRAL AD1 AD0 — — — — — —
H'FF92 ADDRBH AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
H'FF93 ADDRBL AD1 AD0 — — — — — —
H'FF94 ADDRCH AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
H'FF95 ADDRCL AD1 AD0 — — — — — —
H'FF96 ADDRDH AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2
H'FF97 ADDRDL AD1 AD0 — — — — — —
H'FF98 ADCSR ADF ADIE ADST SCAN CH3 CH2 CH1 CH0
H'FF99 ADCR TRGS1 TRGS0 CKS1 CKS0 —
H'FFB0 PORT1 P17 P16 P15 P14 P13 P12 P11 P10 Port 8
H'FFB2 PORT3 P37 P36 P35 P34 P33 P32 P31 P30
H'FFB3 PORT4 P47 P46 P45 P44 P43 P42 P41 P40
H'FFB6 PORT7 P77 P76 P75 P74 P73 P72 P71 P70
H'FFB8 PORT9 P97 P96 P95 P94 P93 P92 P91 P90
H'FFB9 PORTA PA3 PA2 PA1 PA0
H'FFBA PORTB PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
H'FFBB PORTC PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0
H'FFBC PORTD PD7 PD6 PD5 PD4 PD3 PD2 PD1 PD0
H'FFBD PORTE PE7 PE6 PE5 PE4 PE3 PE2 PE1 PE0
H'FFBE PORTF PF7 PF6 PF5 PF4 PF3 PF2 PF1 PF0
H'FFBF PORTG — — — PG4 PG3 PG2 PG1 PG0
Note: Undefined and reserved addresses are for use in future functional expansion or have test
registers, etc., assigned to them. These registers must not be accessed, since operation in
the event of such access, and subsequent operation, cannot be guaranteed.