Datasheet

Appendix B Internal I/O Register
R01UH0166EJ0600 Rev. 6.00 Page 1239 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
B.2 Functions
DADR2—D/A Data Register 2
DADR3—D/A Data Register 3
DADR0—D/A Data Register 0
DADR1—D/A Data Register 1
H'FDAC
H'FDAD
H'FFA4
H'FFA5
D/A2
D/A3
D/A0
D/A1
7
0
R/W
6
0
R/W
5
0
R/W
4
0
R/W
3
0
R/W
0
0
R/W
2
0
R/W
1
0
R/W
Bit
Initial value
R/W
:
:
:
DACR23—D/A Control Register 23
DACR01—D/A Control Register 01
H'FDAE
H'FFA6
D/A2, 3
D/A0, 1
7
DAOE1
0
R/W
6
DAOE0
0
R/W
5
DAE
0
R/W
4
—
1
—
3
—
1
—
0
—
1
—
2
—
1
—
1
—
1
—
Bit
Initial value
R/W
:
:
:
D/A output enable 1
0
Disables analog output DA1 (DA3).
1
Enables channel 1 D/A conversion. Also enables analog output DA1 (DA3).
D/A output enable 0
0
Disables analog output DA0 (DA2).
1
Enables channel 0 D/A conversion. Also enables analog output DA0 (DA2).
D/A enable
DAOE1 DAOE0 DAE Description
0 0 *
Disables channel 0, 1 (channel 2, 3) D/A conversion.
1 0
Enables channel 0 (channel 2) D/A conversion.
Disables channel 1 (channel 3) D/A conversion.
1
Enables channel 0, 1 (channel 2, 3) D/A conversion.
1 0 0
Disables channel 0 (channel 2) D/A conversion.
Enables channel 1 (channel 3)D/A conversion.
1
Enables channel 0, 1 (channel 2, 3) D/A conversion.
1 *
Enables channel 0, 1 (channel 2, 3) D/A conversion.
* : Don’t care