Datasheet

Appendix B Internal I/O Register
R01UH0166EJ0600 Rev. 6.00 Page 1255 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
SBYCR—Standby Control Register H'FDE4 System
7
SSBY
0
R/W
6
STS2
0
R/W
5
STS1
0
R/W
4
STS0
0
R/W
3
OPE
1
R/W
0
—
0
—
2
—
0
—
1
—
0
—
Software standby
0 When the SLEEP command is executed in high-speed or medium-speed modes,
the operation enters sleep mode.
When the SLEEP command is executed in subactive mode, the operation enters
subsleep mode.
1 When the SLEEP command is executed in high-speed and medium-speed modes,
operation enters software standby mode, subactive mode, and watch mode.
When the SLEEP command is executed in subactive mode, operation enters
watch mode and high-speed mode.
Output port enable
0 In software standby mode, watch mode, and
during direct transfer, the address bus and bus
control signal are in the high-impedance state.
1 In software standby mode, watch mode, and
during direct transfer, the address bus and bus
control signal remain in the output state.
Standby timer select 2 to 0
STS2 STS1 STS0
0 0 0
1
1 0
1
1 0 0
1
1 0
1
Bit
Initial value
R/W
:
:
:
Hold time: 8192 states
Hold time: 16384 states
Hold time: 32768 states
Hold time: 65536 states
Hold time: 131072 states
Hold time: 262144 states
Reserved
Hold time: 16 states
*
Note: * This setting should not be selected with this product.