Datasheet

ManualsBrandsRENESAS ManualsMicrocontrollers, Microprocessors & QuartzesEmbedded microcontroller TQFP 120 (14x14) 16-Bit 25 MHz I/O number 73

Appendix B Internal I/O Register

R01UH0166EJ0600 Rev. 6.00 Page 1273 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

TM

,

H8S/2633R F-ZTAT

TM

, H8S/2695

NDRL—Next Data Register L H'FE2D, H'FE2F PPG

7

—

1

—

6

—

1

—

5

—

1

—

4

—

1

—

3

—

1

—

0

—

1

—

2

—

1

—

1

—

1

—

Bit

Initial value

R/W

:

:

:

7

NDR7

0

R/W

6

NDR6

0

R/W

5

NDR5

0

R/W

4

NDR4

0

R/W

3

NDR3

0

R/W

0

NDR0

0

R/W

2

NDR2

0

R/W

1

NDR1

0

R/W

Bit

Initial value

R/W

:

:

:

7

—

1

—

6

—

1

—

5

—

1

—

4

—

1

—

3

NDR3

0

R/W

0

NDR0

0

R/W

2

NDR2

0

R/W

1

NDR1

0

R/W

Bit

Initial value

R/W

:

:

:

7

NDR7

0

R/W

6

NDR6

0

R/W

5

NDR5

0

R/W

4

NDR4

0

R/W

3

—

1

—

0

—

1

—

2

—

1

—

1

—

1

—

Bit

Initial value

R/W

Different triggers for pulse output groups.

Note: For details see section 12.2.4, Notes on NDR Access.

Same trigger for pulse output groups.

:

:

:

P1DDR—Port 1 Data Direction Register H'FE30 Port

7

P17DDR

0

W

6

P16DDR

0

W

5

P15DDR

0

W

4

P14DDR

0

W

3

P13DDR

0

W

0

P10DDR

0

W

2

P12DDR

0

W

1

P11DDR

0

W

Bit

Initial value

R/W

:

:

: