Datasheet

Appendix B Internal I/O Register
Page 1286 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
TIOR2—Timer I/O Control Register 2 H'FF32 TPU2
7
IOB3
0
R/W
6
IOB2
0
R/W
5
IOB1
0
R/W
4
IOB0
0
R/W
3
IOA3
0
R/W
0
IOA0
0
R/W
2
IOA2
0
R/W
1
IOA1
0
R/W
*: Don't care
TGR2A I/O Control
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
TGR2A is
output
compare
register
TGR2A is
input
capture
register
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCA2 pin
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
* 0
1
0
1
*
*: Don't care
TGR2B I/O Control
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
TGR2B is
output
compare
register
TGR2B is
input
capture
register
Output disabled
Initial output is 0
output
Output disabled
Initial output is 1
output
Capture input
source is
TIOCB2 pin
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
* 0
1
0
1
*
Bit
Initial value
R/W
:
:
: