Datasheet

Appendix B Internal I/O Register
R01UH0166EJ0600 Rev. 6.00 Page 1299 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
ABWCR—Bus Width Control Register H'FED0 Bus Controller
7
ABW7
1
R/W
0
R/W
6
ABW6
1
R/W
0
R/W
5
ABW5
1
R/W
0
R/W
4
ABW4
1
R/W
0
R/W
3
ABW3
1
R/W
0
R/W
0
ABW0
1
R/W
0
R/W
2
ABW2
1
R/W
0
R/W
1
ABW1
1
R/W
0
R/W
Area 7 to 0 bus width control
Sets area n to 16-bit access.
Sets area n to 8-bit access.
0
1
(n= 7 to 0)
Bit
Modes 5 to 7
Initial value
R/W
Mode 4
Initial value
R/W
:
:
:
:
:
:
ASTCR—Access State Control Register H'FED1 Bus Controller
7
AST7
1
R/W
6
AST6
1
R/W
5
AST5
1
R/W
4
AST4
1
R/W
3
AST3
1
R/W
0
AST0
1
R/W
2
AST2
1
R/W
1
AST1
1
R/W
Area 7 to 0 access state control
Area n set as 2-state access area.
Insertion of wait states in area n external area access is disabled.
External area access of area n set as 3-state access area.
Insertion of wait states in area n external area access is enabled.
0
1
(n= 7 to 0)
Bit
Initial value
R/W
:
:
: