Datasheet

Appendix B Internal I/O Register
R01UH0166EJ0600 Rev. 6.00 Page 1309 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
IOAR0B—I/O Address Register 0B
IOAR1B—I/O Address Register 1B
H'FEEC
H'FEFC
DMAC
DMAC
*: Undefined
Bit
IOAR0B
Initial value
R/W
:
:
:
:
15
*
R/W
14
*
R/W
13
*
R/W
12
*
R/W
11
*
R/W
10
*
R/W
9
*
R/W
8
*
R/W
7
*
R/W
6
*
R/W
5
*
R/W
4
*
R/W
3
*
R/W
2
*
R/W
1
*
R/W
0
*
R/W
In short address mode: Specifies transfer destination/transfer source address
In full address mode: Not used
ETCR0B—Transfer Count Register 0B H'FEEE DMAC
Note: Not used in normal mode. *: Undefined
Bit
ETCR0B
Initial value
R/W
:
:
:
:
Sequential mode
and idle mode
Repeat mode
Block transfer mode
15
*
R/W
14
*
R/W
13
*
R/W
12
*
R/W
11
*
R/W
10
*
R/W
9
*
R/W
8
*
R/W
7
*
R/W
6
*
R/W
5
*
R/W
4
*
R/W
3
*
R/W
2
*
R/W
1
*
R/W
0
*
R/W
Transfer counter
Transfer counter
Holds number of transfers
Block transfer counter