Datasheet

Appendix B Internal I/O Register
R01UH0166EJ0600 Rev. 6.00 Page 1333 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
FLPWCR—Flash Memory Power Control Register H'FFAC FLASH
7
PDWND
0
R/W
6
—
0
R
5
—
0
R
4
—
0
R
3
—
0
R
0
—
0
R
2
—
0
R
1
—
0
R
Power-down disable
0 Transition to flash memory power-down mode enabled
1 Transition to flash memory power-down mode disabled
Bit
Initial value
R/W
:
:
:
PORT1—Port 1 Register H'FFB0 Port
7
P17
—*
R
6
P16
—*
R
5
P15
—*
R
4
P14
—*
R
3
P13
—*
R
0
P10
—*
R
2
P12
—*
R
1
P11
—*
R
Bit
Initial value
R/W
Note: * Determined by status of pins P17 to P10.
:
:
:
PORT3—Port 3 Register H'FFB2 Port
7
P37
—*
R
6
P36
—*
R
5
P35
—*
R
4
P34
—*
R
3
P33
—*
R
0
P30
—*
R
2
P32
—*
R
1
P31
—*
R
Bit
Initial value
R/W
Note: * Determined by status of pins P37 to P30.
:
:
: