Datasheet

Appendix C I/O Port Block Diagrams
Page 1378 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
R
PG1DDR
C
QD
Reset
Internal data bus
WDDRG
Reset
Modes 4 to 6
WDRG
R
PG1DR
C
QD
PG1
RDRG
RPORG
Bus controller
OE output
IRQ interrupt input
OE output enable
Chip select
WDDRG:
WDRG:
RDRG:
RPORG:
Write to PGDDR
Write to PGDR
Read PGDR
Read port G
Legend:
Figure C.12 (b) Port G Block Diagram (Pin PG1)