Datasheet

Appendix C I/O Port Block Diagrams
R01UH0166EJ0600 Rev. 6.00 Page 1419 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
R
PG1DDR
C
QD
Reset
WDDRG
Reset
WDRG
R
PG1DR
C
QD
PG1
RDRG
RPORG
Internal data bus
Modes 4 to 6
Bus controller
Chip select
WDDRG:
WDRG:
RDRG:
RPORG:
Write to PGDDR
Write to PGDR
Read PGDR
Read port G
Legend:
IRQ interrupt input
Figure C.24 (b) Port G Block Diagram (Pin PG1)