Datasheet

Appendix D Pin States
Page 1426 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Table D.2 I/O Port States in Each Processing State (H8S/2695)
Port Name
Pin Name
MCU
Operating
Mode
Power-
On
Reset
Manual
Reset
Hardware
Standby
Mode
Software
Standby
Mode
Bus
Release
State
Program
Execution
State
Sleep Mode
Port 1 4 to 7 T kept T kept kept I/O port
Port 3 4 to 7 T kept T kept kept I/O port
Port 4 4 to 7 T T T T T Input port
P77 to P74 4 to 7 T kept T kept kept I/O port
7 T kept T kept kept I/O port P73/CS7
P72/CS6
P71/CS5
P70/CS4
4 to 6 T kept T [DDR · OPE = 0]
T
[DDR · OPE = 1]
H
T [DDR = 0]
Input port
[DDR = 1]
CS7 to CS4
Port 9 4 to 7 T T T T T Input port
4, 5 L kept T Port A
6 T kept T
[Address output,
OPE = 0]
T
[Address output,
OPE = 1]
kept
[Otherwise]
kept
[Address
output]
T
[Otherwise]
kept
[Address
output]
A19 to A17
[Otherwise]
I/O port
7 T kept T kept kept I/O port
4, 5 L kept T Port B
6 T kept T
[Address output,
OPE = 0]
T
[Address output,
OPE = 1]
kept
[Otherwise]
kept
[Address
output]
T
[Otherwise]
kept
[Address
output]
A15 to A8
[Otherwise]
I/O port
7 T kept T kept kept I/O port