Datasheet

Section 3 MCU Operating Modes
R01UH0166EJ0600 Rev. 6.00 Page 97 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Section 3 MCU Operating Modes
3.1 Overview
3.1.1 Operating Mode Selection
The H8S/2633 Group has four operating modes (modes 4 to 7). These modes enable selection of
the CPU operating mode, enabling/disabling of on-chip ROM, and the initial bus width setting, by
setting the mode pins (MD2 to MD0).
Table 3.1 lists the MCU operating modes.
Table 3.1 MCU Operating Mode Selection
External Data Bus
MCU
Operating
Mode
MD2 MD1 MD0
CPU
Operating
Mode
Description
On-Chip
ROM
Initial
Width
Max.
Width
0
*
0 0 0 — — — —
1
*
1
2
*
1 0
3
*
1
4 1 0 0 Advanced Disabled 16 bits 16 bits
5 1
On-chip ROM disabled,
expanded mode
8 bits 16 bits
6 1 0 On-chip ROM enabled,
expanded mode
Enabled 8 bits 16 bits
7 1 Single-chip mode —
Note: * Not available in the H8S/2633 Group.
The CPU’s architecture allows for 4 Gbytes of address space, but the H8S/2633 Group actually
accesses a maximum of 16 Mbytes.
Modes 4 to 6 are externally expanded modes that allow access to external memory and peripheral
devices.
The external expansion modes allow switching between 8-bit and 16-bit bus modes. After
program execution starts, an 8-bit or 16-bit address space can be set for each area, depending on
the bus controller setting. If 16-bit access is selected for any one area, 16-bit bus mode is set; if 8-
bit access is selected for all areas, 8-bit bus mode is set.