Datasheet

Section 3 MCU Operating Modes
R01UH0166EJ0600 Rev. 6.00 Page 107 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
H'000000
H'FFB000
H'FFEFC0
H'FFF800
H'040000
H'000000
H'03FFFF
H'000000
H'FFEFBF
External address
space
On-chip RAM
*
1
On-chip RAM
*
1
External address space
Internal I/O registers
On-chip RAM
*
1
External address space
External address space External address space
Internal I/O registers
On-chip ROM
External address
space
On-chip ROM
On-chip RAM
Internal I/O registers
*
2
Internal I/O registers
*
2
Internal I/O registers
*
2
Internal I/O registers
Notes:
H'FFFFFF
H'FFFF40
H'FFFF60
H'FFFFC0
H'FFB000 H'FFB000
H'FFEFC0
H'FFF800
H'FFFF40
H'FFFF60
H'FFFFC0
H'FFFF60
H'FFFFC0
On-chip RAM
*
1
On-chip RAM
H'FFFFFF
H'FFFFFF
H'FFF800
H'FFFF3F
1. External addresses can be accessed by clearing the RAME bit in SYSCR to 0.
2. Area H'FFF800 to H'FFFDAB is reserved, and must not be accessed.
Modes 4 and 5
(advanced expanded modes
with on-chip ROM disabled)
Mode 6
(advanced expanded mode
with on-chip ROM enabled)
Mode 7
(advanced single-chip mode)
Figure 3.1 Memory Map in Each Operating Mode in the H8S/2633, H8S/2633R