Datasheet

Section 4 Exception Handling
R01UH0166EJ0600 Rev. 6.00 Page 117 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
φ
RES, MRES
Internal
address bus
Internal read
signal
Internal write
signal
Internal data
bus
Vector
fetch
(1) (3) (5)
High
Internal
processing
Prefetch of
first program
instruction
(2) (4)
(1) (3) Reset exception handling vector address (when power-on reset, (1) = H'000000,
(3) = H'000002)
(2) (4) Start address (contents of reset exception handling vector address)
(5) Start address ((5) = (2) (4))
(6) First program instruction
(6)
Figure 4.3 Reset Sequence (Modes 6 and 7)
4.2.4 Interrupts after Reset
If an interrupt is accepted after a reset but before the stack pointer (SP) is initialized, the PC and
CCR will not be saved correctly, leading to a program crash. To prevent this, all interrupt requests,
including NMI, are disabled immediately after a reset. Since the first instruction of a program is
always executed immediately after the reset state ends, make sure that this instruction initializes
the stack pointer (example: MOV.L #xx: 32, SP).