Datasheet

Section 7 Bus Controller
R01UH0166EJ0600 Rev. 6.00 Page 183 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Bit 3—Burst Cycle Select 0 (BRSTS0): Selects the number of words that can be accessed in a
burst ROM interface burst access.
Bit 3
BRSTS0 Description
0 Max. 4 words in burst access (Initial value)
1 Max. 8 words in burst access
Bits 2 to 0—RAM Type Select (RMTS2 to RMTS0): In advanced mode, these bits select the
memory interface for areas 2 to 5.
When DRAM space
*
is selected, the appropriate area becomes the DRAM interface
*
.
Note: * This function is not available in the H8S/2695.
Only a 0 may be written to RMTS2, RMTS1, or RMTS0.
Bit 2 Bit 1 Bit 0 Description
RMTS2 RMTS1 RMTS0 Area 5 Area 4 Area 3 Area 2
0 0 0 Normal space Normal space Normal space Normal space
1 Normal space Normal space Normal space DRAM space
*
1 0 Normal space Normal space DRAM space
*
DRAM space
*
1 DRAM space
*
DRAM space
*
DRAM space
*
DRAM space
*
1 1 1 Contiguous
DRAM space
*
Contiguous
DRAM space
*
Contiguous
DRAM space
*
Contiguous
DRAM space
*
Notes: When all areas selected in DRAM are 8-bit space, the PF2 pin can be used as an I/O port
and for BREQO and WAIT. When contiguous RAM is selected set the appropriate bus width
and number of access states (the number of programmable waits) to the same values for all
of areas 2 to 5. Do not set other than the above combinations.
* This function is not available in the H8S/2695.
Only a 0 may be written to RMTS2, RMTS1, or RMTS0.