Datasheet

Section 7 Bus Controller
R01UH0166EJ0600 Rev. 6.00 Page 201 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
7.4.3 Valid Strobes
Table 7.4 shows the data buses used and valid strobes for the access spaces.
In a read, the RD signal is valid without discrimination between the upper and lower halves of the
data bus.
In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the
lower half.
Table 7.4 Data Buses Used and Valid Strobes
Area
Access
Size
Read/
Write Address
Valid
Strobe
Upper Data Bus
(D15 to D8)
Lower data bus
(D7 to D0)
Byte Read — RD Valid Invalid 8-bit access
space
Write — HWR Hi-Z
Byte Read Even RD Valid Invalid 16-bit access
space
Odd Invalid Valid
Write Even HWR Valid Hi-Z
Odd LWR Hi-Z Valid
Word Read — RD Valid Valid
Write — HWR, LWR Valid Valid
Notes: Hi-Z: High impedance.
Invalid: Input state; input value is ignored.