Datasheet

Section 7 Bus Controller
Page 232 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
T
1
Address bus
φ
CS0
AS
Data bus
T
2
T
3
T
1
T
2
T
1
Full access
T
2
RD
Burst access
Low address only changes
Read data Read data Read data
Figure 7.32 (a) Example Burst ROM Access Timing (AST0=BRSTS1=1)