Datasheet

Section 8 DMA Controller (DMAC)
(This function is not available in the H8S/2695)
Page 250 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Table 8.1 (2) Overview of DMAC Functions (Full Address Mode)
Address Register Bit Length
Transfer Mode Transfer Source Source Destination
• Normal mode
Auto-request
⎯ Transfer request retained
internally
⎯ Transfers continue for the
specified number of times (1 to
65536)
⎯ Choice of burst or cycle steal
transfer
• Auto-request
24 24
External request
⎯ 1-byte or 1-word transfer
executed for one transfer request
⎯ 1 to 65536 transfers
• External request
• Block transfer mode
⎯ Specified block size transfer
executed for one transfer request
⎯ 1 to 65536 transfers
⎯ Either source or destination
specifiable as block area
⎯ Block size: 1 to 256 bytes or
words
• TPU channel 0 to
5 compare
match/input
capture A interrupt
• SCI transmit-data-
empty interrupt
• SCI reception
complete interrupt
• External request
• A/D converter
conversion end
interrupt
24 24