Datasheet

Section 8 DMA Controller (DMAC)
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 285 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
8.5 Operation
8.5.1 Transfer Modes
Table 8.5 lists the DMAC modes.
Table 8.5 DMAC Transfer Modes
Transfer Mode Transfer Source Remarks
Short
address
mode
Dual
address
mode
(1) Sequential mode
(2) Idle mode
(3) Repeat mode
• TPU channel 0 to 5
compare match/input
capture A interrupt
• SCI transmit-data-empty
interrupt
• SCI reception complete
interrupt
• A/D converter
conversion end
interrupt
• External request
• Up to 4 channels can
operate independently
• External request
applies to channel B
only
• Single address mode
applies to channel B
only
• Modes (1), (2), and (3)
can also be specified
for single address
mode
(4) Single address mode
Full address
mode
(5) Normal mode • External request
• Auto-request
(6) Block transfer
mode
• TPU channel 0 to 5
compare match/input
capture A interrupt
• SCI transmit-data-
empty interrupt
• SCI reception complete
interrupt
• A/D converter
conversion end interrupt
• External request
• Max. 2-channel
operation, combining
channels A and B
• With auto-request,
burst mode transfer or
cycle steal transfer
can be selected