Datasheet

Section 9 Data Transfer Controller (DTC)
(This function is not available in the H8S/2695)
Page 352 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
On-chip
supporting
module
IRQ interrupt
DTVECR
Selection circuit
Interrupt controller
CPU
DTC
DTCER
Clear
controller
Select
Interrupt
request
Source flag cleared
Clear
Clear request
Interrupt mask
Figure 9.3 Block Diagram of DTC Activation Source Control
When an interrupt has been designated a DTC activation source, existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.