Datasheet

R01UH0166EJ0600 Rev. 6.00 Page xli of lvi
Mar 02, 2011
8.5.10 DMAC Bus Cycles (Dual Address Mode)........................................................ 313
8.5.11 DMAC Bus Cycles (Single Address Mode) ..................................................... 321
8.5.12 Write Data Buffer Function .............................................................................. 327
8.5.13 DMAC Multi-Channel Operation ..................................................................... 328
8.5.14 Relation between External Bus Requests, Refresh Cycles, the DTC,
and the DMAC.................................................................................................. 329
8.5.15 NMI Interrupts and DMAC............................................................................... 330
8.5.16 Forced Termination of DMAC Operation......................................................... 331
8.5.17 Clearing Full Address Mode............................................................................. 332
8.6 Interrupts........................................................................................................................... 333
8.7 Usage Notes ...................................................................................................................... 334
Section 9 Data Transfer Controller (DTC)
(This function is not available in the H8S/2695)...................................... 339
9.1 Overview........................................................................................................................... 339
9.1.1 Features............................................................................................................. 339
9.1.2 Block Diagram.................................................................................................. 340
9.1.3 Register Configuration...................................................................................... 341
9.2 Register Descriptions........................................................................................................ 342
9.2.1 DTC Mode Register A (MRA) ......................................................................... 342
9.2.2 DTC Mode Register B (MRB).......................................................................... 343
9.2.3 DTC Source Address Register (SAR)............................................................... 344
9.2.4 DTC Destination Address Register (DAR)....................................................... 345
9.2.5 DTC Transfer Count Register A (CRA) ........................................................... 345
9.2.6 DTC Transfer Count Register B (CRB)............................................................ 346
9.2.7 DTC Enable Registers (DTCER)...................................................................... 346
9.2.8 DTC Vector Register (DTVECR)..................................................................... 347
9.2.9 Module Stop Control Register A (MSTPCRA) ................................................ 348
9.3 Operation .......................................................................................................................... 349
9.3.1 Overview........................................................................................................... 349
9.3.2 Activation Sources............................................................................................ 351
9.3.3 DTC Vector Table............................................................................................. 353
9.3.4 Location of Register Information in Address Space ......................................... 357
9.3.5 Normal Mode.................................................................................................... 358
9.3.6 Repeat Mode ..................................................................................................... 359
9.3.7 Block Transfer Mode ........................................................................................ 360
9.3.8 Chain Transfer .................................................................................................. 362
9.3.9 Operation Timing.............................................................................................. 363
9.3.10 Number of DTC Execution States .................................................................... 364
9.3.11 Procedures for Using DTC................................................................................ 366