Datasheet

Section 9 Data Transfer Controller (DTC)
(This function is not available in the H8S/2695)
R01UH0166EJ0600 Rev. 6.00 Page 357 of 1434
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
9.3.4 Location of Register Information in Address Space
Figure 9.5 shows how the register information should be located in the address space.
Locate the MRA, SAR, MRB, DAR, CRA, and CRB registers, in that order, from the start address
of the register information (contents of the vector address). In the case of chain transfer, register
information should be located in consecutive areas.
Locate the register information in the on-chip RAM (addresses: H'FFEBC0 to H'FFEFBF).
Register
information
start address
Chain
transfer
Register information
for 2nd transfer in
chain transfer
MRA SAR
MRB
DAR
CRA CRB
4 bytes
Lower address
CRA CRB
Register information
MRA
0123
SAR
MRB
DAR
Figure 9.5 Location of Register Information in Address Space