Datasheet

Section 10A I/O Ports
(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)
Page 372 of 1434 R01UH0166EJ0600 Rev. 6.00
Mar 02, 2011
H8S/2633 Group, H8S/2633 F-ZTAT
TM
,
H8S/2633R F-ZTAT
TM
, H8S/2695
Table 10A.1 Port Functions
Port Description Pins Mode 4 Mode 5 Mode 6 Mode 7
Port 1
• 8-bit I/O
port
• Schmitt-
triggered
input (P16,
P14)
P17/PO15/TIOCB2/
PWM3/TCLKD
P16/PO14/TIOCA2/
PWM2/IRQ1
P15/PO13/TIOCB1/
TCLKC
P14/PO12/TIOCA1/
IRQ0
P13/PO11/TIOCD0/
TCLKB/A23
P12/PO10/TIOCC0/
TCLKA/A22
P11/PO9/TIOCB0/
DACK1/A21
P10/PO8/TIOCA0/
DACK0/A20
8-bit I/O port also functioning as DMA
controller output pins (DACK0, DACK1), TPU
I/O pins (TCLKA, TCLKB, TCLKC, TCLKD,
TIOCA0, TIOCB0, TIOCC0, TIOCD0, TIOCA1,
TIOCB1, TIOCA2, TIOCB2), PPG output pins
(PO15 to PO8), interrupt input pins (IRQ0,
IRQ1), 14-bit PWM output pins (PWM2,
PWM3), and address outputs (A20 to A23)
8-bit I/O port
also function-
ing as DMA
controller
output pins
(DACK0,
DACK1), TPU
I/O pins
(TCLKA,
TCLKB,
TCLKC,
TCLKD,
TIOCA0,
TIOCB0,
TIOCC0,
TIOCD0,
TIOCA1,
TIOCB1,
TIOCA2,
TIOCB2), PPG
output pins
(PO15 to
PO8), interrupt
input pins
(IRQ0, IRQ1),
and 14-bit
PWM output
pins (PWM2,
PWM3)
Port 3 • 8-bit I/O
port
• Open-drain
output
capability
• Schmitt-
triggered
input (P35,
P32)
P37 /TxD4
P36/RxD4
P35/SCK1/SCK4/
SCL0/IRQ5
P34 /RxD1/SDA0
P33 /TxD1/SCL1
P32 /SCK0/SDA1/IRQ4
P31 /RxD0/IrRxD
P30 /TxD0/IrTxD
8-bit I/O port also functioning as SCI (channel 0, 1, and 4) I/O
pins (TxD0, RxD0, SCK0, IrTxD, IrRxD, TxD1, RxD1, SCK1,
TxD4, RxD4, SCK4), interrupt input pins (IRQ4, IRQ5), and IIC
(channel 0 and 1) I/O pins (SCL0, SDA0, SCL1, SDA1)