Datasheet

Section 10A I/O Ports

(H8S/2633, H8S/2632, H8S/2631, H8S/2633R)

R01UH0166EJ0600 Rev. 6.00 Page 379 of 1434

Mar 02, 2011

H8S/2633 Group, H8S/2633 F-ZTAT

H8S/2633R F-ZTAT

, H8S/2695

Port 1 Register (PORT1)

Bit : 7 6 5 4 3 2 1 0

P17 P16 P15 P14 P13 P12 P11 P10

Initial value : —

—

R/W : R R R R R R R R

Note: * Determined by state of pins P17 to P10.

PORT1 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of

output data for the port 1 pins (P17 to P10) must always be performed on P1DR.

If a PORT1 read is performed while P1DDR bits are set to 1, the P1DR values are read. If a

PORT1 read is performed while P1DDR bits are cleared to 0, the pin states are read.

After a power-on reset and in hardware standby mode, PORT1 contents are determined by the pin

states, as P1DDR and P1DR are initialized. PORT1 retains its prior state by a manual reset or in

software standby mode.

10A.2.3 Pin Functions

Port 1 pins also function as PPG output pins (PO15 to PO8), TPU I/O pins (TCLKA, TCLKB,

TCLKC, TCLKD, TIOCA0, TIOCB0, TIOCC0, TIOCD0, TIOCA1, TIOCB1, TIOCA2, and

TIOCB2), DMAC output pins (DACK0 and DACK1), external interrupt input pins (IRQ0 and

IRQ1), 14-bit PWM output pins (PWM2 and PWM3), and address bus output pins (A23 to A20).

Port 1 pin functions are shown in table 10A.3.